Burr?Brown Productsfrom Texas InstrumentsPCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
24-BIT192-kHzSAMPLING8-CHANNELENHANCEDMULTILEVEL
DELTA-SIGMADIGITAL-TO-ANALOGCONVERTER
FEATURESAPPLICATIONS
???????
IntegratedA/VReceivers
DVDMovieandAudioPlayersHDTVReceiversCarAudioSystems
DVDAdd-OnCardsforHigh-EndPCsDigitalAudioWorkstations
OtherMultichannelAudioSystems
?24-BitResolution?AnalogPerformance
–DynamicRange:105dBTypical–SNR:105dBTypical–THD+N:0.002%Typical
–Full-ScaleOutput:3.1Vp-p,Typical?4×/8×OversamplingInterpolationFilter–Stop-BandAttenuation:–55dB–Pass-BandRipple:±0.03dB
?SamplingFrequency:5kHzto200kHz
?Accepts16-,18-,20-,and24-BitAudioData?DataFormats:Standard,I2S,andLeft-Justified?SystemClock:128fS,192fS,256fS,384fS,512fS,or768fS
?User-ProgrammableFunctions
–DigitalAttenuation:0dBto–63dB,0.5dB/Step–SoftMute
–ZeroFlagsCanBeUsedasGeneral-PurposeLogicOutput–DigitalDe-Emphasis
–DigitalFilterRolloff:SharporSlow?Dual-SupplyOperation–5-VAnalog–3.3-VDigital
?5-VTolerantDigitalLogicInputs?Package:LQFP-48
DESCRIPTION
ThePCM1609AisaCMOS,monolithicintegratedcircuitthatfeatureseight24-bitaudiodigital-to-analogconverters(DACs)andsupportcircuitryinasmallLQFP-48package.TheDACsuseTexasInstruments(TI)enhancedmultileveldelta-sigmaarchitecturethatemploysfourth-ordernoiseshapingand8-levelamplitudequantizationtoachieveexcellentsignal-to-noiseperformanceandahightolerancetoclockjitter.
ThePCM1609Aacceptsindustry-standardaudiodataformatswith16-to24-bitaudiodata.Samplingratesupto200kHzaresupported.Afullsetofuser-programmablefunctionsisaccessiblethrougha4-wireserialcontrolportthatsupportsregisterwriteandreadfunctions.
Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
FilterProisatrademarkofTexasInstruments.
Allothertrademarksarethepropertyoftheirrespectiveowners.
Copyright?2005–2008,TexasInstrumentsIncorporated
PRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsoftheTexasInstrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.
Not Recommended For New Designs
PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comThisintegratedcircuitcanbedamagedbyESD.TexasInstrumentsrecommendsthatallintegratedcircuitsbehandledwithappropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage.
ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemoresusceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications.
ABSOLUTEMAXIMUMRATINGS(1)
overoperatingfree-airtemperaturerange(unlessotherwisenoted)
VDDVCCVCC,VDD
Power-supplyvoltagerangeSupplyvoltagedifferenceGroundvoltagedifferencesDigitalinputvoltagerange
Inputcurrent(exceptpowersupplypins)OperatingtemperaturerangeunderbiasStoragetemperaturerangeJunctiontemperatureLeadtemperature(soldering)Packagetemperature(reflow,peak)
(1)
–0.3Vto4V–0.3Vto6.5VVCC–VDD<3V
±0.1V–0.3Vto6.5V
±10mA–40°Cto125°C–55°Cto150°C
150°C260°C,5s260°C
Stressesbeyondthoselistedunder\"absolutemaximumratings\"maycausepermanentdamagetothedevice.Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder\"recommendedoperatingconditions\"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
RECOMMENDEDOPERATINGCONDITIONS
MIN
Digitalsupplyvoltage,VDDAnalogsupplyvoltage,VCCDigitalinputlogicfamilyDigitalinputclockfrequencyAnalogoutputloadresistanceAnalogoutputloadcapacitanceDigitaloutputloadcapacitanceOperatingfree-airtemperature,TA
–25
SystemclockSamplingclock
8.192325
502085
34.5
NOM3.35TTL
36.8192
MHzkHzk?pFpF°C
MAX3.65.5
UNITVV
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ELECTRICALCHARACTERISTICS
AllspecificationsatTA=25°C,VCC=5V,VDD=3.3V,systemclock=384fS(fS=44.1kHz),and24-bitdata(unlessotherwisenoted)
PARAMETER
RESOLUTIONDATAFORMAT
AudiodatainterfaceformatsAudiodatabitlengthAudiodataformat
fS
SamplingfrequencySystemclockfrequency
DIGITALINPUT/OUTPUT
Logicfamily
VIHVILIIH(1)IIL(1)IIH(2)IIL(2)VOHVOL
Outputlogiclevel
(3)(4)
TESTCONDITIONSMINTYP24
MAXUNITBits
Standard,I2S,left-justified16/18/20/24bit,selectableMSBfirst,binary2scomplement
5
128fS,192fS,256fS,384fS,512fS,768fS
TTLcompatible2
0.8
VIN=VDD
10–10
65
2.4
1
0.002%0.004%0.005%0.7%0.9%1%
98
105103102
98
105103102
94
103101100±0.5±1±1
VOUT=0.5VCCatbipolarzero
±30
±6±3±60
dB%ofFSR%ofFSRmVdBdBdB
0.008%
100–10
VdcμA
VIN=0VVIN=VDDVIN=0VIOH=–4mAIOL=4mA
VOUT=0dB,fS=44.1kHzVOUT=0dB,fS=96kHzVOUT=0dB,fS=192kHzVOUT=–60dB,fS=44.1kHzVOUT=–60dB,fS=96kHzVOUT=–60dB,fS=192kHzEIAJ,A-weighted,fS=44.1kHz
Vdc
200
kHz
Inputlogiclevel
Inputlogiccurrent
DYNAMICPERFORMANCE
THD+NTotalharmonicdistortion+noise
Dynamicrange
A-weighted,fS=96kHzA-weighted,fS=192kHzEIAJ,A-weighted,fS=44.1kHz
SNRSignal-to-noiseratio
A-weighted,fS=96kHzA-weighted,fS=192kHzfS=44.1kHz
ChannelseparationLevellinearityerror
DCACCURACY
Gainerror
Gainmismatch,channel-to-channelBipolarzeroerror
(1)(2)(3)(4)
fS=96kHzfS=192kHzVOUT=–90dB
Pins31,38,40,41,45–47(DATA4,SCKI,BCK,LRCK,DATA1,DATA2,DATA3)Pins34–37(MDI,MC,ML,RST)AnalogperformancespecificationsaretestedusingaSystemTwo?CascadeaudiomeasurementsystembyAudioPrecision?with400-HzHPFon,30-kHzLPFon,averagemodewith20-kHzbandwidthlimiting.Theloadconnectedtotheanalogoutputis5k?orlargerviacapacitiveloading.
Conditionsin192-kHzoperationaresystemclock=128fSandoversamplingrate=fSinregister12.
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comELECTRICALCHARACTERISTICS(continued)
AllspecificationsatTA=25°C,VCC=5V,VDD=3.3V,systemclock=384fS(fS=44.1kHz),and24-bitdata(unlessotherwisenoted)
PARAMETER
ANALOGOUTPUT
OutputvoltageCentervoltageLoadimpedance
DIGITALFILTERPERFORMANCE
GroupdelaytimeDe-emphasiserror
FilterCharacteristics1,SharpRolloff
PassbandPassbandStopbandPass-bandrippleStop-bandattenuationStop-bandattenuation
FilterCharacteristics2,SlowRolloff
PassbandPassbandStopbandPass-bandrippleStop-bandattenuation
ANALOGFILTERPERFORMANCE
Frequencyresponse
POWER-SUPPLYREQUIREMENTSVDDVCCIDD(6)
Supplycurrent
ICC
Voltagerange
fS=44.1kHzfS=96kHzfS=192kHzfS=44.1kHzfS=96kHzfS=192kHzfS=44.1kHz
Powerdissipation
TEMPERATURERANGETAθJA(5)(6)
OperatingtemperatureThermalresistance
Conditionsin192-kHzoperationaresystemclock=128fSandoversamplingrate=fSinregister12.SCKOisdisabled.
–25
100
85
°C°C/W
fS=96kHzfS=192kHz
(5)
TESTCONDITIONS
Fullscale(–0dB)ACload
MINTYP0.62VCC0.5VCC
MAXUNITVp-pVdck?
5
20/fS±0.1
dB
0.4fS0.487fS
±0.03dB–3dB
0.6fS
±0.03
Stopband=0.6fSStopband=0.567fS±0.5dB–3dB
0.884fS
±0.5
Stopband=0.884fSf=20kHzf=44kHz
34.5–40
–0.03–0.23.35184040333636224312312
313463.65.525
–50–55
0.198fS0.39fS
dBdBdB
dBdB
dB
Vdc
mA
mW
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FUNCTIONALBLOCKDIAGRAM
Output Amp andLow-Pass FilterOutput Amp andLow-Pass FilterOutput Amp andLow-Pass FilterOutput Amp andLow-Pass FilterOutput Amp andLow-Pass FilterOutput Amp andLow-Pass FilterOutput Amp andLow-Pass FilterOutput Amp andLow-Pass FilterBCKLRCKSerialInputI/FDACVOUT1DACVOUT2DATA1 (1, 2)DATA2 (3, 4)DATA3 (5, 6)DATA4 (7, 8)DAC4× / 8×OversamplingDigital FilterwithFunctionControllerVOUT3EnhancedMultilevelDelta-SigmaModulatorDACVOUT4DACVOUT5TESTRSTMLMCMDIMDODACSystem ClockSCKISystem ClockDACFunctionControlI/FVOUT6DACVOUT7VOUT8VCOMManagerZero DetectPower SupplySCKOZERO1/GPO1ZERO2/GPO2ZERO3/GPO3ZERO4/GPO4ZERO5/GPO5ZERO6/GPO6AGND1?6VCC1?5ZERO7ZERO8VDDDGNDB0033-03Copyright?2005–2008,TexasInstrumentsIncorporatedSubmitDocumentationFeedback
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comPT PACKAGE(TOP VIEW)AGND13635343332313029282726RST37SCKI38SCKO39BCK40LRCK41TEST42VDD43DGND44DATA145DATA246DATA347ZEROA481234567101112AGND22524VCC323AGND322VCC421AGND420VOUT819AGND618VCC517AGND516VOUT715VCOM14VOUT113VOUT2ZERO8ZERO7DATA4VCC1PCM1609AZERO1/GPO1ZERO2/GPO2ZERO3/GPO3ZERO4/GPO4ZERO5/GPO5ZERO6/GPO6VOUT6VOUT5VOUT4VCC2MDOMDIMCNCMLVOUT3NCNCP0028-03TERMINALFUNCTIONS
TERMINALNAMEAGND1AGND2AGND3AGND4AGND5AGND6BCKDATA1DATA2DATA3DATA4DGNDLRCKMCMDIMDO(1)(2)(3)6
NO.2725232117194047314441353433
I/O––––––IIIII–IIIO
AnaloggroundAnaloggroundAnaloggroundAnaloggroundAnaloggroundAnalogground
Shiftclockinputforserialaudiodata.Clockmustbeoneof32fS,48fS,orfS.SerialaudiodataforVOUT1andVOUT2SerialaudiodataforVOUT3andVOUT4SerialaudiodataforVOUT5andVOUT6SerialaudiodataforVOUT7andVOUT8Digitalground
Leftandrightclock.Thisclockisequaltothesamplingrate,fS.Shiftclockforserialcontrolport
(2)
(2)(3)
(1)
(1)(1)(1)(1)
(1)
DESCRIPTION
Serialdatainputforserialcontrolport
Serialdataoutputforserialcontrolport
Schmitt-triggerinput,5-Vtolerant
Schmitt-triggerinputwithinternalpulldown,5-Vtolerant3-stateoutput
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TERMINALFUNCTIONS(continued)
TERMINALNAMEMLNCRSTSCKISCKOTESTVCC1VCC2VCC3VCC4VCC5VCOMVDDVOUT1VOUT2VOUT3VOUT4VOUT5VOUT6VOUT7VOUT8ZERO1/GPO1ZERO2/GPO2ZERO3/GPO3ZERO4/GPO4ZERO5/GPO5ZERO6/GPO6ZERO7ZERO8ZEROA
NO.367,8,2937383942282624221813141312111091620123456303248
I/OI–IIO––––––O–OOOOOOOOOOOOOOOOO
LatchenableforserialcontrolportNoconnection
Systemreset,activelow
(2)
(1)
(2)
DESCRIPTION
Systemclockinput.Inputfrequencyisoneof128fS,192fS,256fS,384fS,512fS,or768fS.
Bufferedclockoutput.Outputfrequencyisoneof128fS,192fS,256fS,384fS,512fS,or768fS,orone-halfof128fS,192fS,256fS,384fS,512fS,or768fS.Test.ThispinshouldbeconnectedtoDGND.Analogpowersupply,5VAnalogpowersupply,5VAnalogpowersupply,5VAnalogpowersupply,5VAnalogpowersupply,5V
Commonvoltage.Thispinshouldbebypassedwitha10-μFcapacitortoAGND.Digitalpowersupply,3.3V
VoltageoutputofaudiosignalcorrespondingtoleftchannelonDATA1VoltageoutputofaudiosignalcorrespondingtorightchannelonDATA1VoltageoutputofaudiosignalcorrespondingtoleftchannelonDATA2VoltageoutputofaudiosignalcorrespondingtorightchannelonDATA2VoltageoutputofaudiosignalcorrespondingtoleftchannelonDATA3VoltageoutputofaudiosignalcorrespondingtorightchannelonDATA3VoltageoutputofaudiosignalcorrespondingtoleftchannelonDATA4VoltageoutputofaudiosignalcorrespondingtorightchannelonDATA4Zero-dataflagforVOUT1.CanalsobeusedasGPOpin.Zero-dataflagforVOUT2.CanalsobeusedasGPOpin.Zero-dataflagforVOUT3.CanalsobeusedasGPOpin.Zero-dataflagforVOUT4.CanalsobeusedasGPOpin.Zero-dataflagforVOUT5.CanalsobeusedasGPOpin.Zero-dataflagforVOUT6.CanalsobeusedasGPOpin.Zero-dataflagforVOUT7Zero-dataflagforVOUT8
Zero-dataflag.LogicalANDofZERO1throughZERO8.
(2)
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comTYPICALPERFORMANCECURVES
AllspecificationsatTA=25°C,VCC=5V,VDD=3.3V,fS=44.1kHz,systemclock=384fS,and24-bitinputdata(unless
otherwisenoted)
DigitalFilter(De-EmphasisOff)
FREQUENCYRESPONSE(SHARPROLLOFF)
0?20?40?60?80?100?120?140012Frequency [×??fS]34G001PASS-BANDFREQUENCYRESPONSE(SHARPROLLOFF)
0.050.040.030.020.010.00?0.01?0.02?0.03?0.04?0.050.00.10.20.30.40.5G002Amplitude ? dBAmplitude ? dBFrequency [×??fS]Figure1.
FREQUENCYRESPONSE(SLOWROLLOFF)
0?20?40?60?80?100?120?140012Frequency [×??fS]34G003Figure2.
TRANSITIONCHARACTERISTICS(SLOWROLLOFF)
3210?1?2?3?4?50.00.10.20.30.40.5G004Amplitude ? dBAmplitude ? dBFrequency [×??fS]Figure3.Figure4.
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TYPICALPERFORMANCECURVES(continued)
AllspecificationsatTA=25°C,VCC=5V,VDD=3.3V,fS=44.1kHz,systemclock=384fS,and24-bitinputdata(unlessotherwisenoted)
DigitalFilter(De-EmphasisCurves)
DE-EMPHASIS(fS=32kHz)
0?1?2?3Level ? dBError ? dBDE-EMPHASISERROR(fS=32kHz)
0.50.40.30.20.10.0?0.1?0.2?0.3?0.4?0.5?4?5?6?7?8?9?1002468101214G00502468101214G006f ? Frequency ? kHzf ? Frequency ? kHzFigure5.
DE-EMPHASIS(fS=44.1kHz)
0?1?2?3Level ? dBFigure6.
DE-EMPHASISERROR(fS=44.1kHz)
0.50.40.30.2Error ? dB?4?5?6?7?8?9?1002468101214161820G0070.10.0?0.1?0.2?0.3?0.4?0.502468101214161820G008f ? Frequency ? kHzf ? Frequency ? kHzFigure7.
DE-EMPHASIS(fS=48kHz)
0?1?2?3Level ? dBError ? dBFigure8.
DE-EMPHASISERROR(fS=48kHz)
0.50.40.30.20.10.0?0.1?0.2?0.3?0.4?0.5?4?5?6?7?8?9?100246810121416182022G0090246810121416182022G010f ? Frequency ? kHzf ? Frequency ? kHzFigure9.
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Figure10.
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comTYPICALPERFORMANCECURVES(continued)
ANALOGDYNAMICPERFORMANCE
AllspecificationsatTA=25°C,VCC=5V,VDD=3.3V,and24-bitinputdata(unlessotherwisenoted).Conditionsin192-kHzoperationaresystemclock=128fS,DAC3throughDAC6disabledinregister8,andoversamplingrate=fS(setbyOVERbitinregister12).
SupplyVoltageCharacteristics
TOTALHARMONICDISTORTION+NOISE
vs
SUPPLYVOLTAGE
(VDD=3.3V)
THD+N ? Total Harmonic Distortion + Noise ? %DYNAMICRANGE
vs
SUPPLYVOLTAGE
(VDD=3.3V)
11010?60dB/96kHz, 384fS10.10.01?60dB/44.1kHz, 384fS0dB/192kHz, 128fS?60dB/192kHz, 128fS108Dynamic Range ? dB1061041021009844.1kHz, 384fS96kHz, 384fS0dB/96kHz, 384fS192kHz, 128fS0.0010dB/44.1kHz, 384fS0.00014.04.55.0VCC ? Supply Voltage ? V5.56.0G0119.04.55.0VCC ? Supply Voltage ? V5.56.0G012Figure11.
SIGNAL-TO-NOISERATIO
vs
SUPPLYVOLTAGE
(VDD=3.3V)
11011010844.1kHz, 384fS96kHz, 384fSFigure12.
CHANNELSEPARATION
vs
SUPPLYVOLTAGE
(VDD=3.3V)
SNR ? Signal-to-Noise Ratio ? dB1081061041021009.0192kHz, 128fSChannel Separation ? dB1061041021009.044.1kHz, 384fS96kHz, 384fS192kHz, 128fS4.55.0VCC ? Supply Voltage ? V5.56.0G0134.55.0VCC ? Supply Voltage ? V5.56.0G014Figure13.Figure14.
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TYPICALPERFORMANCECURVES(continued)
ANALOGDYNAMICPERFORMANCE(continued)
AllspecificationsatTA=25°C,VCC=5V,VDD=3.3V,and24-bitinputdata(unlessotherwisenoted).Conditionsin192-kHzoperationaresystemclock=128fS,DAC3throughDAC6disabledinregister8,andoversamplingrate=fS(setbyOVERbitinregister12).
TemperatureCharacteristics
TOTALHARMONICDISTORTION+NOISE
vs
TEMPERATURE
THD+N ? Total Harmonic Distortion + Noise ? %DYNAMICRANGE
vs
TEMPERATURE
11010?60dB/192kHz, 128fS10.10.01?60dB/44.1kHz, 384fS0dB/192kHz, 128fS0dB/96kHz, 384fS?60dB/96kHz, 384fS108Dynamic Range ? dB10610410244.1kHz, 384fS96kHz, 384fS192kHz, 128fS100980.0010dB/44.1kHz, 384fS0.0001?50?250255075100G01596?50?250255075100G016TA ? Free-Air Temperature ? °CTA ? Free-Air Temperature ? °CFigure15.
SIGNAL-TO-NOISERATIO
vs
TEMPERATURE
110110108Figure16.
CHANNELSEPARATION
vs
TEMPERATURE
SNR ? Signal-to-Noise Ratio ? dB10810610410210096?50192kHz, 128fSChannel Separation ? dB44.1kHz, 384fS96kHz, 384fS106104102100192kHz, 128fS96?5044.1kHz, 384fS96kHz, 384fS?250255075100G017?250255075100G018TA ? Free-Air Temperature ? °CTA ? Free-Air Temperature ? °CFigure17.Figure18.
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comSYSTEMCLOCKANDRESETFUNCTIONS
SYSTEMCLOCKINPUT
ThePCM1609Arequiresasystemclockforoperatingthedigitalinterpolationfiltersandmultileveldelta-sigmamodulators.ThesystemclockisappliedattheSCKIinput(pin38).Table1showsexamplesofsystemclockfrequenciesforcommonaudiosamplingrates.
Figure19showsthetimingrequirementsforthesystemclockinput.Foroptimalperformance,itisimportanttouseaclocksourcewithlowphasejitterandnoise.ThePLL170xmulticlockgeneratorfromTiisanexcellentchoiceforprovidingthePCM1609Asystemclock.
Table1.SystemClockRatesforCommonAudioSamplingFrequencies
SAMPLINGFREQUENCY
(kHz)
8163244.146192
(1)
SYSTEMCLOCKFREQUENCY(fSCLK)
(MHz)
128fS
(1)(1)(1)(1)(1)(1)
192fS
(1)(1)(1)(1)(1)(1)
256fS2.0484.0968.19211.2612.28824.576
(1)
384fS3.0726.14412.28816.934418.43236.8
(1)
512fS4.0968.19216.38422.579224.579.152
(1)
768fS6.14412.28824.57633.868836.8
(1)(1)
24.57636.8
Thissystemclockisnotsupportedforthegivensamplingfrequency.
tw(SCKH)HSystem ClockLtw(SCKL)0.8 VSystem ClockPulse CycleTime(1)T0005A082 VSYMBOLtw(SCKH)tw(SCKL)
(1)
Systemclockpulseduration,HIGHSystemclockpulseduration,LOW1/128fS,56fS,1/384fS,1/512fS,and1/768fS.
MIN77
MAXUNITnsns
Figure19.SystemClockTiming
SYSTEMCLOCKOUTPUT
AbufferedversionofthesystemclockinputisavailableattheSCKOoutput(pin39).SCKOcanoperateateitherfull(fSCKI)orhalf(fSCKI/2)rate.TheSCKOoutputfrequencycanbeprogrammedusingtheCLKDbitofregister9.TheSCKOoutputpincanalsobeenabledordisabledusingtheCLKEbitofregister9.IftheSCKOoutputisnotrequired,itisrecommendedtodisableitusingtheCLKEbit.ThedefaultisSCKOenabled.
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POWER-ONANDEXTERNALRESETFUNCTIONS
ThePCM1609Aincludesapower-onresetfunction(seeFigure20).Withthesystemclockactive,andVDD>2V(typical,1.6Vto2.4V),thepower-onresetfunctionisenabled.Theinitializationsequencerequires1024systemclocksfromthetimeVDD>2V.Aftertheinitializationperiod,thePCM1609Aissettoitsresetdefaultstate,asdescribedintheModeControlRegisterssectionofthisdatasheet.
ThePCM1609AalsoincludesanexternalresetcapabilityusingtheRSTinput(pin37).ThisallowsanexternalcontrollerormasterresetcircuittoforcethePCM1609Atoinitializetoitsresetdefaultstate.Fornormaloperation,RSTshouldbesettoalogic1.
TheexternalresetoperationandtimingisshowninFigure21.TheRSTpinissettologic-0foraminimumof20ns.Aftertheinitializationsequenceiscompleted,thePCM1609Aissettoitsresetdefaultstate,asdescribedintheModeControlRegisterssectionofthisdatasheet.
Duringtheresetperiod(1024systemclocks),theanalogoutputsareforcedtothebipolarzerolevel(orVCC/2).Aftertheresetperiod,theinternalregistersareinitializedinthenext1/fSperiodand,ifSCKI,BCK,andLRCKareprovidedcontinuously,thePCM1609AprovidesproperanalogoutputwiththegroupdelaytimegivenintheElectricalCharacteristicssectionofthisdatasheet.
TheexternalresetisespeciallyusefulinapplicationswherethereisadelaybetweenPCM1609Apowerupandsystem-clockactivation.Inthiscase,theRSTpinshouldbeheldatalogic-0leveluntilthesystemclockhasbeenactivated.
2.4 V2 V1.6 V0 VResetInternal ResetReset RemovalVDDDon’t CareSystem Clock1024 System ClocksT0014-08Figure20.Power-OnResetTiming
RSTResetInternal ResetReset Removal1024 System ClocksSystem ClockT0015-06Figure21.ExternalResetTiming
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TheaudioserialinterfaceforthePCM1609Aconsistsofa5-wiresynchronousserialport.ItincludesLRCK(pin41),BCK(pin40),DATA1(pin45),DATA2(pin46),DATA3(pin47),andDATA4(pin31).BCKistheserialaudiobitclock,andisusedtoclocktheserialdatapresentonDATA1,DATA2,DATA3,andDATA4intotheaudiointerfaceserialshiftregister.SerialdataisclockedintothePCM1609AontherisingedgeofBCK.LRCKistheserialaudioleft/rightwordclock.Itisusedtolatchserialdataintotheserialaudiointerfaceinternalregisters.BothLRCKandBCKmustbesynchronoustothesystemclock.Ideally,itisrecommendedthatLRCKandBCKbederivedfromthesystemclockinput,SCKI.LRCKisoperatedatthesamplingfrequency(fS).BCKcanbeoperatedat32,48,ortimesthesamplingfrequency(I2SformatdoesnotsupportBCK=32fS).
InternaloperationofthePCM1609AissynchronizedwithLRCK.Accordingly,internaloperationofthedeviceissuspendedwhenthesamplingrateclock(LRCK)ischanged,orwhenSCKIand/orBCKisinterruptedatleastfora3-bitclockcycle.IfSCKI,BCK,andLRCKareprovidedcontinuouslyafterthissuspendedstate,theinternaloperationisresynchronizedautomaticallywithinaperiodoflessthan3/fS.Duringthisresynchronizationperiodandfora3/fStimethereafter,theanalogoutputsareforcedtothebipolarzerolevel,VCC/2.Externalresettingisnotrequired.
AUDIODATAFORMATSANDTIMING
ThePCM1609Asupportsindustry-standardaudiodataformats,includingstandard,I2S,andleft-justified(seeFigure22).Dataformatsareselectedusingtheformatbits,FMT[2:0],inregister9.Thedefaultdataformatis24-bitstandard.Allformatsrequirebinary2scomplement,MSB-firstaudiodata.SeeFigure23foradetailedtimingdiagramoftheserialaudiointerface.
DATA1,DATA2,DATA3,andDATA4eachcarrytwoaudiochannels,designatedastheleftandrightchannels.Theleft-channeldataalwaysprecedestheright-channeldataintheserialdatastreamforalldataformats.Table2showsthemappingofthedigitalinputdatatotheanalogoutputpins.
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(1) Standard Data Format; L-Channel = HIGH, R-Channel = LOW1/fSLRCKL-ChannelR-ChannelBCK(= 32 fS, 48 fS, or fS)16-Bit Right-Justified, BCK = 32 fSDATA141516123141516LSB123141516LSBMSB16-Bit Right-Justified, BCK = 48 fS or fSDATA141516123MSB141516LSB123141516LSBMSB18-Bit Right-JustifiedDATA161718123MSB161718LSB123161718LSBMSB20-Bit Right-JustifiedDATA181920123MSB181920LSB123181920LSBMSB24-Bit Right-JustifiedDATA222324123MSB222324LSB123222324LSBMSBMSB(2) I2S Data Format; L-Channel = LOW, R-Channel = HIGH1/fSLRCKBCK(= 48 fS, or fS)L-ChannelR-ChannelDATA123N–2N–1N123N–2N–1N12MSBLSBMSBLSB(3) Left-Justified Data Format; L-Channel = HIGH, R-Channel = LOW1/fSLRCKL-ChannelR-ChannelBCK(= 48 fS, or fS)DATA123N–2N–1N123N–2N–1N12MSBLSBMSBLSBT0009-05Figure22.AudioDataInputFormats
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www.ti.comLRCK1.4 Vt(BCH)t(BCL)t(LB)BCKt(BCY)t(BL)1.4 VDATA1, DATA2,DATA3, DATA4t(DS)t(DH)1.4 VT0010-07SYMBOLt(BCY)t(BCH)t(BCL)t(BL)t(LB)t(DS)t(DH)(1)
BCKpulsecycletimeBCKhigh-leveltimeBCKlow-leveltimeBCKrisingedgetoLRCKedgeLRCKfallingedgetoBCKrisingedgeDATAsetuptimeDATAholdtimefSisthesamplingfrequency(e.g.,44.1kHz,48kHz,96kHz,etc.)
MIN1/(fS)(1)353510101010MAXUNITnsnsnsnsnsnsFigure23.AudioInterfaceTiming
Table2.AudioInputDatatoAnalogOutputMapping
DATAINPUTDATA1DATA1DATA2DATA2DATA3DATA3DATA4DATA4
CHANNEL
LeftRightLeftRightLeftRightLeftRight
ANALOGOUTPUT
VOUT1VOUT2VOUT3VOUT4VOUT5VOUT6VOUT7VOUT8
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SERIALCONTROLINTERFACE
Theserialcontrolinterfaceisa4-wiresynchronousserialportthatoperatesasynchronouslytotheserialaudiointerface.Theserialcontrolinterfaceisusedtoprogramandreadtheon-chipmoderegisters.ThecontrolinterfaceincludesMDO(pin33),MDI(pin34),MC(pin35),andML(pin36).MDOistheserialdataoutputusedtoreadbackthevaluesofthemoderegisters.MDIistheserialdatainputusedtoprogramthemoderegisters.MCistheserialbitclockusedtoshiftdatainandoutofthecontrolport.MListhecontrolportlatchclock.
REGISTERWRITEOPERATION
Allwriteoperationsfortheserialcontrolportuse16-bitdatawords.Figure24showsthecontroldatawordformat.Themostsignificantbit(MSB)istheread/write(R/W)bit.Whensetto0,thisbitindicatesawriteoperation.Sevenbits,labeledIDX[6:0],settheregisterindex(oraddress)forthewriteoperation.Theleastsignificanteightbits,D[7:0],containthedatatobewrittentotheregisterspecifiedbyIDX[6:0].
Figure25showsthefunctionaltimingdiagramforwritingtotheserialcontrolport.MLisheldatalogic-1stateuntilaregisteristobewritten.Tostarttheregisterwritecycle,MLissettologic0.SixteenclocksarethenprovidedonMC,correspondingtothe16bitsofthecontroldatawordonMDI.Afterthesixteenthclockcyclehascompleted,MLissettologic1tolatchthedataintotheindexedmodecontrolregister.
MSBR/WIDX6IDX5IDX4IDX3IDX2IDX1IDX0D7D6D5D4D3D2D1LSBD0Register Index (or Address)Read/Write Operation0 = Write Operation1 = Read Operation (Register Index is Ignored)Register DataR0001-02Figure24.ControlDataWordFormatforMDI
MLMCMDIXR/WIDX6IDX5IDX4IDX3IDX2IDX1IDX0D7D6D5D4D3D2D1D0XXR/WIDX6T0048-02Figure25.WriteOperationTiming
SINGLEREGISTERREADOPERATION
Readoperationsusethe16-bitcontrolwordformatshowninFigure24.Forreadoperations,theR/Wbitissetto1.Readoperationsignoretheindexbits,IDX[6:0],ofthecontroldataword.Instead,theREG[6:0]bitsincontrolregister11areusedtosettheindexoftheregisterthatistobereadduringthereadoperation.BitsIDX[6:0]shouldbesetto00hforreadoperations.
ThedetailsofthereadoperationareshowninFigure26.First,controlregister11mustbewrittenwiththeindexoftheregistertobereadback.Additionally,theINCbitmustbesettologic0inordertodisabletheauto-incrementreadfunction.ThereadcycleistheninitiatedbysettingMLtologic0andsettingtheR/Wbitofthecontroldatawordtologic1,indicatingareadoperation.MDOremainsinahigh-impedancestateuntilthelasteightbitsofthe16-bitreadcycle,whichcorrespondtotheeightdatabitsoftheregisterindexedbytheREG[6:0]bitsofcontrolregister11.ThereadcycleiscompletedwhenMLissetto1,immediatelyaftertheMCclockcyclefortheleastsignificantbit(LSB)oftheindexedcontrolregisterhascompleted.
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www.ti.comINC = 1 (Auto-Increment Read)MLMCMDI10000000XXXXXXXXMDOHigh ImpedanceD7D6D5D4D3D2D1D0INDEX “N”MLMCMDIXXXXXXXXXXXXXXXXMDOD7D6D5D4D3D2D1D0D7D6D5D4D3D2D1D0INDEX “N + 1”INDEX “Y”High ImpedanceINC = 0 (Single-Register Read)MLMCMDI10000000XXXXXXXXMDOHigh ImpedanceD7D6D5D4D3D2D1D0INDEX “N”T0075-01NOTES:X=Don’tcare
Y=Lastregistertoberead
Insingle-registerread(INC=0),theindexthatindicatestheregistertobereadinreadoperationcanbesetbyREG[6:0]inregister11.Forexample,settingREG[6:0]=0001001bmeansreadingfromregister9.
Inauto-incrementread(INC=1),theindexREG[6:0]indicatesthefirstregistertoberead.Forexample,settingREG[6:0]=0001001bmeansreadingregistersfrom9toY.Yisdeterminedbythelow-to-hightransitionofMLinserialmodecontrol.
Figure26.ReadOperationTiming
AUTO-INCREMENTREADOPERATION
Theauto-incrementreadfunctionallowsformultipleregisterstobereadsequentially.Theauto-incrementreadfunctionisenabledbysettingtheINCbitofcontrolregister11to1.ThesequencealwaysstartswiththeregisterindexedbytheREG[6:0]bitsincontrolregister11,andendsbytheMLsettingto1afterMCclockcyclefortheLSBofthelastregister.
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Figure26showsthetimingoftheauto-incrementreadoperation.Theoperationbeginsbywritingcontrolregister11,settingINCto1,andsettingREG[6:0]tothefirstregistertobereadinthesequence.TheactualreadoperationstartsonthenextHIGH-to-LOWtransitionoftheMLpin.
ThereadcyclestartsbysettingtheR/Wbitofthecontrolwordto1,andsettingalloftheIDX[6:0]bitsto0.AllsubsequentbitsinputonMDIareignoredwhileMLissetto0.Forthefirsteightclocksofthereadcycle,MDOissettothehigh-impedancestate.Thisisfollowedbyasequenceof8-bitwords,eachcorrespondingtothedatacontainedincontrolregistersNthroughY,whereNisdefinedbytheREG[6:0]bitsincontrolregister11,andwhereYisthelastregistertoberead.ThereadcycleiscompletedwhenMLissetto1,immediatelyaftertheMCclockcyclefortheLSBofthelastregisterhascompleted.IfMLisheldlowandtheMCclockcontinuesbeyondthelastphysicalregister(register19),thereadoperationreturnstocontrolregister1andsubsequentcontrolregisters,continuinguntilMLissetto1.
CONTROLINTERFACETIMINGREQUIREMENTS
Figure27showsadetailedtimingdiagramfortheserialcontrolinterface.Payspecialattentiontothesetupandholdtimes,aswellast(MLS)andt(MLH),whichdefineminimumdelaysbetweentheedgesoftheMLandMCclocks.Thesetimingparametersarecriticalforpropercontrol-portoperation.
t(MHH)MLt(MLS)t(MCH)MCt(MCL)t(MLH)1.4 V1.4 Vt(MCY)MDIt(MDS)t(MDH)LSB1.4 Vt(MOS)MDOLSB50% of VDDT0013-05SYMBOLt(MCY)t(MCL)t(MCH)t(MHH)t(MLS)t(MLH)t(MDH)t(MDS)t(MOS)(1)
MCpulsecycletimeMClow-leveltimeMChigh-leveltimeMLhigh-leveltimeMLfallingedgetoMCrisingedgeMLholdtime(1)MDIholdtimeMDLsetuptimeMCfallingedgetoMDOstableMCrisingedgeforLSBtoMLrisingedge
MIN100505030020201520MAXUNITnsnsnsnsnsnsnsns30nsFigure27.ControlInterfaceTiming
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www.ti.comMODECONTROLREGISTERS
User-ProgrammableModeControls
ThePCM1609Aincludesanumberofuser-programmablefunctionsthatareaccessedviacontrolregisters.Theregistersareprogrammedusingtheserialcontrolinterfacethatispreviouslydiscussedinthisdatasheet.Table3liststheavailablemodecontrolfunctions,alongwiththeirresetdefaultconditionsandassociatedregisterindex.Table3.User-ProgrammableModeControls
FUNCTION
Digitalattenuationcontrol,
0dBto–63dBin0.5-dBstepsSoftmutecontrol
DAC1–DAC8operationcontrolAudiodataformatcontrolDigitalfilterrolloffcontrolSCKOfrequencyselectionSCKOoutputenable
De-emphasisall-channelfunctioncontrolDe-emphasisall-channelsamplerateselectionOutputphaseselectZero-flagpolarityselectRead-registerindexcontrolReadauto-incrementcontrolGeneral-purposeoutputenable
General-purposeoutputbits(GPO1–GPO6)Oversamplingratecontrol
RESETDEFAULT
CONTROLREGISTER1through6,16,17
7,188,199999101010101111121212
BIT(S)LABELAT1[7:0],AT2[7:0],AT3[7:0],AT4[7:0],AT5[7:0],AT6[7:0],AT7[7:0],AT8[7:0]
MUT[8:1]DAC[8:1]FMT[2:0]FLTCLKDCLKEDMCDMF[1:0]DREVZREVREG[6:0]INCGPOEGPO[6:1]OVER
0dB,noattenuationMutedisabledDAC1–DAC8enabled24-bitstandardformatSharprolloffFullrate(=fSCKI)SCKOenabled
De-emphasis,allchannelsdisabled44.1kHzNormalphaseHigh
REG[6:0]=01hAuto-incrementdisabledZero-flagenabledDisabled×
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ReservedRegisters
Registers00hand0Dhthrough0Fharereservedforfactoryuse.Toensureproperoperation,theusershouldnotwritetoorreadfromtheseregisters.RegisterMap
ThemodecontrolregistermapisshowninTable4.EachregisterincludesanR/Wbitthatdetermineswhetheraregisterread(R/W=1)orwrite(R/W=0)operationisperformed.Eachregisteralsoincludesanindex(oraddress)indicatedbytheIDX[6:0]bits.
Table4.ModeControlRegisterMap
IDX(B14–B8)01h02h03h04h05h06h07h08h09h0Ah0Bh0Ch10h11h12h13h
REG123456710111216171819
B15R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WB14IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6IDX6
B13IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5IDX5
B12IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4IDX4
B11IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3IDX3
B10IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2IDX2
B9IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1IDX1
B8IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0IDX0
B7AT17AT27AT37AT47AT57AT67RSV(1)RSV
(1)
B6AT16AT26AT36AT46AT56AT66RSV(1)RSV
(1)
B5AT15AT25AT35AT45AT55AT65MUT6DAC6FLTDREVREG5GPO6AT75AT85RSV
(1)
B4AT14AT24AT34AT44ATATMUT5DAC5CLKDDMF1REG4GPO5AT74AT84RSV
(1)
B3AT13AT23AT33AT43AT53AT63MUT4DAC4CLKEDMF0REG3GPO4AT73AT83RSV
(1)
B2AT12AT22AT32AT42AT52AT62MUT3DAC3FMT2DMCREG2GPO3AT72AT82RSV
(1)
B1AT11AT21AT31AT41AT51AT61MUT2DAC2FMT1DMCREG1GPO2AT71AT81MUT8DAC8
B0AT10AT20AT30AT40AT50AT60MUT1DAC1FMT0DMCREG0GPO1AT70AT80MUT7DAC7
RSV(1)RSV(1)INCOVERAT77AT87RSV
(1)
RSV(1)ZREVREG6GPOEAT76AT86RSV
(1)
RSV(1)RSV(1)RSV(1)RSV(1)RSV(1)RSV(1)
(1)Reservedfortestoperation.Itshouldbesetto0duringnormaloperation.
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comREGISTERDEFINITIONS
B15
REGISTER1REGISTER2REGISTER3REGISTER4REGISTER5REGISTER6REGISTER16REGISTER17
R/WR/WR/WR/WR/WR/WR/WR/WB14
B13
B12
B11
B10
B9
B8
B7AT17AT27AT37AT47AT57AT67AT77AT87
B6AT16AT26AT36AT46AT56AT66AT76AT86
B5AT15AT25AT35AT45AT55AT65AT75AT85
B4AT14AT24AT34AT44ATATAT74AT84
B3AT13AT23AT33AT43AT53AT63AT73AT83
B2AT12AT22AT32AT42AT52AT62AT72AT82
B1AT11AT21AT31AT41AT51AT61AT71AT81
B0AT10AT20AT30AT40AT50AT60AT70AT80
IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0
R/W–Read/WriteModeSelect
WhenR/W=0,awriteoperationisperformed.WhenR/W=1,areadoperationisperformed.Defaultvalue:0
ATx[7:0]–DigitalAttenuationLevelSetting
Wherex=1through8,correspondingtotheDACoutputVOUTx.Thesebitsareread/write.Defaultvalue:11111111b
EachDACoutput,VOUT1throughVOUT8,includesadigitalattenuatorfunction.Theattenuationlevelcanbesetfrom0dBto–63dBin0.5-dBsteps.Changesinattenuationlevelsaremadebyincrementingordecrementingbyonestep(0.5dB)forevery8/fStimeintervaluntiltheprogrammedattenuatorsettingisreached.Alternatively,theattenuationlevelcanbesettoinfiniteattenuation,ormute.Theattenuationleveliscalculatedusingthefollowingformula:
Attenuationlevel(dB)=0.5(ATx[7:0]DEC–255)WhereATx[7:0]DEC=0through255.
ForATx[7:0]DEC=0through128,theattenuatorissettoinfiniteattenuation.Thefollowingtableshowsattenuationlevelsforvarioussettings.
ATx[7:0]11111111b11111110b11111101b
:10000011b10000010b10000001b10000000b
:00000000b
DECIMALVALUE
2552253:131130129128:0
ATTENUATORLEVELSETTING0dB,noattenuation(default)
–0.5dB–1dB:–62dB–62.5dB–63dBMute:Mute
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B15
REGISTER7REGISTER18
R/WR/WB14B13B12B11B10B9B8B7RSVRSV
B6RSVRSV
B5MUT6RSV
B4MUT5RSV
B3MUT4RSV
B2MUT3RSV
B1MUT2MUT8
B0MUT1MUT7
IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0
R/W–Read/WriteModeSelect
WhenR/W=0,awriteoperationisperformed.WhenR/W=1,areadoperationisperformed.Defaultvalue:0
MUTx–SoftMuteControl
Wherex=1through8,correspondingtotheDACoutputVOUTx.Thesebitsareread/write.Defaultvalue:0
MUTx=0MUTx=1
Mutedisabled(default)Muteenabled
Themutebits,MUT1throughMUT8,areusedtoenableordisablethesoftmutefunctionforthecorrespondingDACoutputs,VOUT1throughVOUT8.Thesoftmutefunctionisincorporatedintothedigitalattenuators.Whenmuteisdisabled(MUTx=0),theattenuatorandDACoperatenormally.WhenmuteisenabledbysettingMUTx=1,thedigitalattenuatorforthecorrespondingoutputisdecreasedfromthecurrentsettingtotheinfiniteattenuationsetting,oneattenuatorstep(0.5dB)atatime.Thisprovidesaquiet,pop-freemutingoftheDACoutput.Onreturningfromsoftmute,bysettingMUTx=0,theattenuatorisincreasedonestepatatimetothepreviouslyprogrammedattenuationlevel.
B15
REGISTER8REGISTER19
R/WR/WB14
B13
B12
B11
B10
B9
B8
B7RSVRSV
B6RSVRSV
B5DAC6RSV
B4DAC5RSV
B3DAC4RSV
B2DAC3RSV
B1DAC2DAC8
B0DAC1DAC7
IDX6IDX5IDX4IDX3IDX2IDX1IDX0IDX6IDX5IDX4IDX3IDX2IDX1IDX0
R/W–Read/WriteModeSelect
WhenR/W=0,awriteoperationisperformed.WhenR/W=1,areadoperationisperformed.Defaultvalue:0
DACx–DACOperationControl
Wherex=1through8,correspondingtotheDACoutputVOUTx.Thesebitsareread/write.Defaultvalue:0
DACx=0DACx=1
DACoperationenabled(default)DACoperationdisabled
TheDACoperationcontrolsareusedtoenableanddisabletheDACoutputs,VOUT1throughVOUT8.WhenDACx=0,theoutputamplifierinputisconnectedtotheDACoutput.WhenDACx=1,theoutputamplifierinputisswitchedtothedccommon-modevoltage(VCOM),equaltoVCC/2.
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REGISTER9
R/WB14B13B12B11B10B9B8B7RSV
B6RSV
B5FLT
B4CLKD
B3CLKE
B2FMT2
B1FMT1
B0FMT0
IDX6IDX5IDX4IDX3IDX2IDX1IDX0
R/W–Read/WriteModeSelect
WhenR/W=0,awriteoperationisperformed.WhenR/W=1,areadoperationisperformed.Defaultvalue:0
FLT–DigitalFilterRolloffControlThisbitisread/write.Defaultvalue:0
FLT=0FLT=1
Sharprolloff(default)Slowrolloff
TheFLTbitallowsuserstoselectthedigitalfilterrolloffthatisbestsuitedtotheirapplication.Twofilterrolloffselectionsareavailable:sharporslow.ThefilterresponsesfortheseselectionsareshownintheTypicalPerformanceCurvessectionofthisdatasheet.CLKD–SCKOFrequencySelectionThisbitisread/write.Defaultvalue:0
CLKD=0CLKD=1
Full-rate,fSCKO=fSCKI(default)Half-rate,fSCKO=fSCKI/2
TheCLKDbitisusedtodeterminetheclockfrequencyatthesystemclockoutputpin,SCKO.CLKE–SCKOOutputEnableThisbitisread/write.Defaultvalue:0
CLKE=0CLKE=1
SCKOenabled(default)SCKOdisabled
TheCLKEbitisusedtoenableordisablethesystemclockoutputpin,SCKO.WhenSCKOisenabled,itoutputseitherafull-orhalf-rateclock,basedonthesettingoftheCLKDbit.WhenSCKOisdisabled,itissettoaLOWlevel.
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FMT[2:0]–AudioInterfaceDataFormatThesebitsareread/write.Defaultvalue:000b
FMT[2:0]000001010011100101110111
AudioDataFormatSelection
24-bitstandardformat,right-justifieddata(default)20-bitstandardformat,right-justifieddata18-bitstandardformat,right-justifieddata16-bitstandardformat,right-justifieddataI2Sformat,16bitto24bit
Left-justifiedformat,16bitto24bitReservedReserved
TheFMT[2:0]bitsareusedtoselectthedataformatfortheserialaudiointerface.
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REGISTER10
R/WB14B13B12B11B10B9B8B7RSV
B6ZREV
B5DREV
B4DMF1
B3DMF0
B2DMC
B1DMC
B0DMC
IDX6IDX5IDX4IDX3IDX2IDX1IDX0
R/W–Read/WriteModeSelect
WhenR/W=0,awriteoperationisperformed.WhenR/W=1,areadoperationisperformed.Defaultvalue:0
ZREV–Zero-FlagPolaritySelectDefaultvalue:0
ZREV=0ZREV=1
Zero-flagpinsHIGHatazerodetect(default)Zero-flagpinsLOWatazerodetect
TheZREVbitallowstheusertoselectthepolarityofzero-flagpins.DREV–OutputPhaseSelectDefaultvalue:0
DREV=0DREV=1
Normaloutput(default)Invertedoutput
TheDREVbitallowstheusertoselectthephaseofanalogoutputsignal.DMF[1:0]–SamplingFrequencySelectionfortheDe-EmphasisFunctionThesebitsareread/write.Defaultvalue:00b
DMF[1:0]00011011
De-EmphasisSampleRateSelection44.1kHz(default)48kHz32kHzReserved
TheDMF[1:0]bitsareusedtoselectthesamplingfrequencyusedforthedigitalde-emphasisfunctionwhenitisenabled.Thede-emphasiscurvesareshownintheTypicalPerformanceCurvessectionofthisdatasheet.Theprecedingtableshowstheavailablesamplingfrequencies.DMC–DigitalDe-Emphasis,All-ChannelFunctionControlThisbitisread/write.Defaultvalue:0
DMC=0DMC=1
De-emphasisdisabledforallchannels(default)De-emphasisenabledforallchannels
TheDMCbitsareusedtoenableordisablethede-emphasisfunctionforallchannels.ThethreeDMCbitsareORedtogether.SettinganyoneDMCbit,anycombinationoftwoDMCbits,orallthreeDMCbitsto1enablesdigitalde-emphasisforallchannels.SettingallthreeDMCbitsto0disablesdigitalde-emphasisforallchannels.
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B15
REGISTER11
R/WB14B13B12B11B10B9B8B7INC
B6REG6
B5REG5
B4REG4
B3REG3
B2REG2
B1REG1
B0REG0
IDX6IDX5IDX4IDX3IDX2IDX1IDX0
R/W–Read/WriteModeSelect
WhenR/W=0,awriteoperationisperformed.WhenR/W=1,areadoperationisperformed.Defaultvalue:0
INC–Auto-IncrementReadControlThisbitisread/write.Defaultvalue:0
INC=0INC=1
Auto-incrementreaddisabled(default)Auto-incrementreadenabled
TheINCbitisusedtoenableordisabletheauto-incrementreadfeatureoftheserialcontrolinterface.SeetheSerialControlInterfacesectionofthisdatasheetfordetailsregardingauto-incrementreadoperation.REG[6:0]–ReadRegisterIndexThesebitsareread/write.Defaultvalue:01h
TheREG[6:0]bitsareusedtosettheindexoftheregistertobereadwhenperformingthesingle-registerreadoperation.Inthecaseofanauto-incrementreadoperation,theREG[6:0]bitsindicatetheindexofthelastregistertobereadintheauto-incrementreadsequence.Forexample,ifregisters1through6aretobereadduringanauto-incrementreadoperation,theREG[6:0]bitswouldbesetto06h.SeetheSerialControlInterfacesectionofthisdatasheetfordetailsregardingthesingle-registerandauto-incrementreadoperations.
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comB15
REGISTER12
R/WB14B13B12B11B10B9B8B7B6B5B4B3B2B1B0
IDX6IDX5IDX4IDX3IDX2IDX1IDX0OVERGPOEGPO6GPO5GPO4GPO3GPO2GPO1
R/W–Read/WriteModeSelect
WhenR/W=0,awriteoperationisperformed.WhenR/W=1,areadoperationisperformed.Defaultvalue:0
OVER–OversamplingRateControlThisbitisread/write.Defaultvalue:0
Systemclockrate=256fS,384fS,512fS,or768fS:
OVER=0OVER=1
×oversampling(default)128×oversampling
Systemclockrate=128fSor192fS:
OVER=0OVER=1
32×oversampling(default)×oversampling
TheOVERbitisusedtocontroltheoversamplingrateofthedelta-sigmaDACs.TheOVER=1settingisrecommendedwhentheoversamplingrateis192kHz(systemclockrateis128fSor192fS).GPOE–General-PurposeOutputEnableThisbitisread/write.Defaultvalue:0
GPOE=0GPOE=1
General-purposeoutputsdisabled(default)
Pinsdefaulttozero-flagfunction(ZERO1throughZERO6).
General-purposeoutputsenabled
DatawrittentoGPO1throughGPO6appearsatthecorrespondingpins.
GPOx–General-PurposeLogicOutput
Where:x=1through6,correspondingpinsGPO1throughGPO6.Thesebitsareread/write.Defaultvalue:0
GPOx=0GPOx=1
SetGPOxto0(default)SetGPOxto1
Thegeneral-purposeoutputpins,GPO1throughGPO6,areenabledbysettingGPOE=1.Thesepinsareusedasgeneral-purposeoutputsforcontrollinguser-definedlogicfunctions.Whengeneral-purposeoutputsaredisabled(GPOE=0),theydefaulttothezero-flagfunction,ZERO1throughZERO6.
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ANALOGOUTPUTS
ThePCM1609Aincludeseightindependentoutputchannels,VOUT1throughVOUT8.Theseareunbalancedoutputs,eachcapableofdriving3.1Vp-ptypicalintoa5-k?acloadwithVCC=5V.TheinternaloutputamplifiersforVOUT1throughVOUT8aredcbiasedtothecommon-mode(orbipolarzero)voltage,equaltoVCC/2.TheoutputamplifiersincludeanRCcontinuous-timefilter,whichhelpstoreducetheout-of-bandnoiseenergypresentattheDACoutputsduetothenoise-shapingcharacteristicsofthePCM1609Adelta-sigmaDACs.ThefrequencyresponseofthisfilterisshowninFigure28.Byitself,thisfilterisnotenoughtoattenuatetheout-of-bandnoisetoanacceptablelevelformostapplications.Anexternallow-passfilterisrequiredtoprovidesufficientout-of-bandnoiserejection.FurtherdiscussionofDACpost-filtercircuitsisprovidedintheApplicationInformationsectionofthisdatasheet.
200?20Level ? dB?40?60?80?1001101001k10k100k1M10MG019f ? Frequency ? HzFigure28.Output-FilterFrequencyResponse
VCOMOUTPUT
Oneunbufferedcommon-modevoltageoutputpin,VCOM(pin15),isbroughtoutfordecouplingpurposes.ThispinisnominallybiasedtoadcvoltagelevelequaltoVCC/2.Ifthispinistobeusedtobiasexternalcircuitry,avoltagefollowerisrequiredforbufferingpurposes.Figure29showsanexampleofusingtheVCOMpinforexternalbiasingapplications.
PCM1609A4VCOM15+3–OPA3371VBIAS++VCC210 μFS00-04Figure29.BiasingExternalCircuitsUsingVCOMPin
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comZEROFLAG
ZERO-DETECTCONDITION
Zerodetectionforeachoutputchannelisindependentfromtheothers.Ifthedataforagivenchannelremainsata0levelfor1024sampleperiods(orLRCKclockperiods),azero-detectconditionexistsforthatchannel.
ZEROOUTPUTFLAGS
Giventhatazero-detectconditionexistsforoneormorechannels,thezero-flagpinsforthosechannelsaresettoalogic-1state.Eachchannel,ZERO1throughZERO6(pins1through6),ZERO7(pin30),andZERO8(pin32),haszero-flagpins.Inaddition,alleightzeroflagsarelogicallyANDedtogether,andtheresultisprovidedattheZEROApin(pin48),whichissettoalogic-1statewhenallchannelsindicateazero-detectcondition.Thezero-flagpinscanbeusedtooperateexternalmutecircuits.ZERO1throughZERO6canbeusedasstatusindicatorsforamicrocontroller,audiosignalprocessor,orotherdigitallycontrolledfunction.
Theactivepolarityofthezero-flagoutputcanbeinvertedbysettingto1theZREVbitofcontrolregister10.Theresetdefaultisactive-highoutput,orZREV=0.
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APPLICATIONINFORMATION
CONNECTIONDIAGRAMS
Abasicconnectiondiagramwiththenecessarypower-supplybypassinganddecouplingcomponentsisshowninFigure30.TIrecommendsusingthecomponentvaluesshowninFigure30foralldesigns.
MLPLL170xSCKO3MCMDMicrocontrollerZERO7, 8DATA4+5V Power Supply10 μFRegulator36ML35MC34MDI33MDO32ZERO831DATA430ZERO729NC28VCC127AGND126VCC225AGND2RST37RST38SCKI39SCKOVCC324AGND323VCC422AGND421VOUT820PCM1609AAGND619VCC518AGND517VOUT716VCOMZERO1/GPO1ZERO2/GPO2ZERO3/GPO3ZERO4/GPO4ZERO5/GPO5ZERO6/GPO6BCKLRCK40BCK41LRCK42TEST43VDDLPFVOUT810 μFDATA1DATA2DATA3ZEROA44DGND45DATA146DATA247DATA348ZEROA10 μFLPFVOUT715LPFLPFVOUT1VOUT2VOUT114VOUT213VOUT6VOUT5VOUT4VOUT3NCNC1234567101112LPFLPFLPFZERO1?6LPFVOUT3VOUT4VOUT5VOUT6S0090-03Figure30.BasicConnectionDiagram
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comDown Mix+5V Analog+3.3V for VDDREG1117+3.3V10 μFOutputLow-PassFilters(4)10 μF10 μF10 μF10 μF10 μF10 μF+10 μF10 μF10 μF2423222120191817161514AGND3AGND4AGND6AGND5VCC3VCC4VOUT8VCC5VOUT7VOUT10.1 μFVOUT2VCOM13252627ANALOG SECTION282930Zero-FlagPCM1609A3132Zero-Flag33343536ZEROADATA1DATA2373839404142434447DATA3DGNDSCKOLRCKTESTSCKIBCKRSTVDD481MLZERO1/GPO12MCZERO2/GPO23MDIZERO3/GPO34MDOZERO4/GPO45ZERO8ZERO5/GPO56DATA4ZERO6/GPO67ZERO7NC8NCNC9VCC1VOUT610AGND1VOUT511VCC2VOUT412AGND2VOUT3+3.3Vfor VDDRS(3)RSRSC11+10 μFRSRSRSDIGITAL SECTIONBufferSCKO3(2)(1)(2)(3)(4)
SerialcontrolandresetfunctionscanbeprovidedbyDSP/decoderGPIOpins.Actualclockoutputusedisdeterminedbytheapplication.RS=22?to100?
SeetheApplicationInformationsectionofthisdatasheetformoreinformation
Figure31.TypicalApplicationDiagram
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27MHzMaster ClockAudio DSPorDecoderPLL170xμC/μP(1)XT1Copyright?2005–2008,TexasInstrumentsIncorporated
RSZero Flag orGeneral?PurposeOutputsfor Mute Circuits,Microcontroller, orDSP/DecoderC100.1 μFS0091-03RL+SUB+CTR+RSRF+LS++LF+++Not Recommended For New Designs
PCM1609Awww.ti.comSLES145B–AUGUST2005–REVISEDMARCH2008
AtypicalapplicationdiagramisshowninFigure31.TheREG1117-3.3fromTIisusedtogenerate3.3VforVDDfromthe5-Vanalogpowersupply.ThePLL170xfromTIisusedtogeneratethesystemclockinputatSCKI,aswellasgeneratingtheclockfortheaudiosignalprocessor.
Seriesresistors(22?to100?)arerecommendedforSCKI,LRCK,BCK,DATA1,DATA2,DATA3,andDATA4.TheseriesresistorcombineswiththestrayPCBanddeviceinputcapacitancetoformalow-passfilter,whichremoveshigh-frequencynoisefromthedigitalsignal,thusreducinghigh-frequencyemission.
POWERSUPPLIESANDGROUNDING
ThePCM1609Arequiresa5-Vanalogsupplyanda3.3-Vdigitalsupply.The5-VsupplyisusedtopowertheDACanalogandoutputfiltercircuitry,whereasthe3.3-Vsupplyisusedtopowerthedigitalfilterandserialinterfacecircuitry.Forbestperformance,the3.3-Vsupplyshouldbederivedfromthe5-Vsupplyusingalinearregulator(seeFigure31).Twocapacitorsarerequiredforsupplybypassing(seeFigure30).ThesecapacitorsshouldbelocatedascloseaspossibletothePCM1609Apackage.The10-μFcapacitorsshouldbetantalumoraluminumelectrolytic,whereasthe0.1-μFcapacitorsareceramic(X7Rtypeisrecommendedforsurface-mountapplications).
DACOUTPUTFILTERCIRCUITS
Delta-sigmaDACsusenoise-shapingtechniquestoimprovein-bandsignal-to-noiseratio(SNR)performanceattheexpenseofgeneratingincreasedout-of-bandnoiseabovetheNyquistfrequency,orfS/2.Theout-of-bandnoisemustbelow-passfilteredinordertoprovideoptimalconverterperformance.Thisisaccomplishedbyacombinationofon-chipandexternallow-passfiltering.
Figure32andFigure33showtherecommendedexternallow-passactivefiltercircuitsfordual-andsingle-supplyapplications.Thesecircuitsaresecond-orderButterworthfiltersusingthemultiplefeedback(MFB)circuitarrangement,whichreducessensitivitytopassivecomponentvariationsoverfrequencyandtemperature.FormoreinformationregardingMFBactivefilterdesign,seetheFilterPro?MFBandSallen-KeyLow-PassFilterDesignProgramapplicationreport(literaturenumberSBFA001)availablefromtheTIwebsite(www.ti.com).BecausetheoverallsystemperformanceisdefinedbythequalityoftheDACsandtheirassociatedanalogoutputcircuitry,high-qualityaudiooperationalamplifiersarerecommendedfortheactivefilters.TheOPA2134andOPA2353dualoperationalamplifiersfromTIareshowninFigure32andFigure33,andarerecommendedforusewiththePCM1609A.
R2R1VINC2AV+*R2R1R3C123–OPA21341R4VOUT+S0053-02Figure32.Dual-SupplyFilterCircuit
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comAV+*R2R1R2R1VINPCM1609AC2R3C123–OPA21341R4VOUT+VCOM+C310 μF+OPA337?To AdditionalLow-PassFilter CircuitsS0056-04Figure33.Single-SupplyFilterCircuit
PCBLAYOUTGUIDELINES
AtypicalPCBfloorplanforthePCM1609AisshowninFigure34.Agroundplaneisrecommended,withtheanaloganddigitalsectionsbeingisolatedfromoneanotherusingasplitorcutinthecircuitboard.ThePCM1609AshouldbeorientedwiththedigitalI/Opinsfacingthegroundplanesplit/cuttoallowforshort,directconnectionstothedigitalaudiointerfaceandcontrolsignalsoriginatingfromthedigitalsectionoftheboard.
Digital Power+VDDGNDAnalog PowerAGND+5VA+VS?VSREGVCCDigital LogicandAudioProcessorVDDDGNDPCM1609AAGNDAnalogGroundOutputCircuitsDigitalGroundDigital SectionAnalog SectionReturn Path for Digital SignalsB0031-05Figure34.RecommendedPCBLayout
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Separatepowersuppliesarerecommendedforthedigitalandanalogsectionsoftheboard.ThispreventstheswitchingnoisepresentonthedigitalsupplyfromcontaminatingtheanalogpowersupplyanddegradingthedynamicperformanceoftheDACs.Incaseswhereacommon5-Vsupplymustbeusedfortheanaloganddigitalsections,aninductance(RFchoke,ferritebead)shouldbeplacedbetweentheanaloganddigital5-Vsupplyconnectionstoavoidcouplingofthedigitalswitchingnoiseintotheanalogcircuitry.Figure35showstherecommendedapproachforsingle-supplyapplications.
RF Choke or Ferrite BeadPower Supplies+5VAGND+VS?VSREGVDDDigital LogicandAudioProcessorVDDVCCDGNDPCM1609AAGNDOutputCircuitsDigital SectionAnalog SectionCommonGroundB0032-05Figure35.Single-SupplyPCBLayout
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comTHEORYOFOPERATION
TheDACsectionofthePCM1609Aisbasedonamultibitdelta-sigmaarchitecture.Thisarchitectureusesafourth-ordernoiseshaperandan8-levelamplitudequantizer,followedbyananaloglow-passfilter.Ablockdiagramofthedelta-sigmamodulatorisshowninFigure36.Thisarchitecturehastheadvantageofstabilityandimprovedjittertolerance,whencomparedtotraditional1-bit(2-level)delta-sigmadesigns.
?+IN8 fS++?Z–1++Z–1++Z–1++Z–1+8-Level QuantizerOUT fS+++B0008-03Figure36.Eight-LevelDelta-SigmaModulator
Thecombinedoversamplingrateofthedigitalinterpolationfilterandthedelta-sigmamodulatoris32fS,fS,or128fS.Thetotaloversamplingrateisdeterminedbythedesiredsamplingfrequency.IffS≤96kHz,theOVERbitinregister12canbesettoanoversamplingrateoffSor128fS.IffS>96kHz,theOVERbitcanbeusedtosettheoversamplingrateto32fSorfS.Figure37showstheout-of-bandquantizationnoiseplotsforboththe×and128×oversamplingscenarios.Noticethatthe128×oversamplingplotshowssignificantlyimprovedout-of-bandnoiseperformance,allowingforasimplifiedlow-passfiltertobeusedattheoutputoftheDAC.
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QUANTIZATIONNOISESPECTRUM
(×OVERSAMPLING)
0?20?400?20?40QUANTIZATIONNOISESPECTRUM
(128×OVERSAMPLING)
Amplitude ? dB?80?100?120?140?160?180012345678G021Amplitude ? dB?60?60?80?100?120?140?160?180012345678G022Frequency [fS]Frequency [fS]Figure37.QuantizationNoiseSpectrum
Figure38illustratesthesimulatedjittersensitivityofthePCM1609A.Toachievebestperformance,thesystemclockjittershouldbelessthan300ps.ThisiseasilyachievedusingaqualityclockgenerationIC,suchasthePLL170xfromTI.
JITTERDEPENDENCE(×OVERSAMPLING)
125120Dynamic Range ? dB11511010510095900100200300Jitter ? ps400500600G020Figure38.JitterSensitivity
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PCM1609ASLES145B–AUGUST2005–REVISEDMARCH2008
www.ti.comKEYPERFORMANCEPARAMETERSANDMEASUREMENT
ThissectionprovidesinformationonhowtomeasurekeydynamicperformanceparametersforthePCM1609A.Inallcases,aSystemTwo?CascadeaudiomeasurementsystembyAudioPrecision?orequivalentisusedtoperformthetesting.
TOTALHARMONICDISTORTION+NOISE(THD+N)
THD+NisasignificantfeatureofmeritforaudioDACs,becauseittakesintoaccountbothharmonicdistortionandallnoisesourceswithinaspecifiedmeasurementbandwidth.ThetruermsvalueofthedistortionandnoiseisreferredtoasTHD+N.ThetestsetupforTHD+NmeasurementsisshowninFigure39.Evaluation BoardDEM-DAI1609AS/PDIFReceiver2nd-OrderLow-PassFilterf–3 dB = kHzPCM1609ADigitalGeneratorS/PDIFOutput100% Full-Scale24-Bit, 1-kHzSine WaveAnalyzerandDisplayrms ModeBand LimitNotch FilterHPF = 22 Hz(1)fC = 1 kHz(1)LPF = 30 kHzOption = 20-kHz Apogee Filter(2)B0062-03(1)(2)
ThereislittledifferenceinmeasuredTHD+Nwhenusingthevarioussettingsforthesefilters.RequiredforTHD+Ntest
Figure39.TestSetupforTHD+NMeasurements
ForPCM1609ADACs,THD+Nismeasuredwithafull-scale1-kHzdigitalsinewaveastheteststimulusattheinputoftheDAC.Thedigitalgeneratorissettoa24-bitaudiowordlengthandasamplingfrequencyof44.1kHzor96kHz.ThedigitalgeneratoroutputistakenfromtheunbalancedS/PDIFconnectorofthemeasurementsystem.TheS/PDIFdataistransmittedviacoaxialcabletothedigitalaudioreceiverontheDEM-DAI1602demonstrationboard.Thereceiveristhenconfiguredtooutput24-bitdataineitherI2Sorleft-justifieddataformat.TheDACaudiointerfaceformatisprogrammedtomatchthereceiveroutputformat.TheanalogoutputisthentakenfromtheDACpostfilterandconnectedtotheanaloganalyzerinputofthemeasurementsystem.Theanaloginputisbandlimited,usingfiltersresidentintheanalyzer.TheresultingTHD+Nismeasuredbytheanalyzeranddisplayedbythemeasurementsystem.
DYNAMICRANGE
DynamicrangeisspecifiedasA-weightedTHD+Nmeasuredwitha–60-dBFS1-kHzdigitalsine-wavestimulusattheinputoftheDAC.ThismeasurementisdesignedtogiveagoodindicationofhowtheDACperforms,givenalow-levelinputsignal.
ThemeasurementsetupforthedynamicrangemeasurementisshowninFigure40,andissimilartotheTHD+Ntestsetupdiscussedpreviously.Thedifferencesincludetheband-limitfilterselection,theadditionalA-weightingfilter,andthe–60-dBFSinputlevel.
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Evaluation BoardDEM-DAI1609AS/PDIFReceiver2nd-OrderLow-PassFilterf–3 dB = kHzPCM1609A(1)S/PDIFOutputDigitalGenerator0% Full-Scale,Dither Off (SNR)–60 dB FS,1-kHz Sine Wave(Dynamic Range)AnalyzerandDisplayrms ModeA-WeightFilter(1)Band LimitNotch FilterHPF = 22 HzfC = 1 kHzLPF = 22 kHzOption = A-Weighting(2)B0063-03(1)(2)
Infinite-zero-detectmutedisabled
ResultswithoutA-weightingareapproximately3dBworse.
Figure40.TestSetupforDynamicRangeandSNRMeasurements
IDLE-CHANNELSIGNAL-TO-NOISERATIO(SNR)
TheSNRtestprovidesameasureofthenoiseoftheDAC.TheinputtotheDACisinall-0sdata,andtheDACinfinite-zero-detectmutefunctionmustbedisabled(defaultconditionatpowerupforthePCM1609A).Thisensuresthatthedelta-sigmamodulatoroutputisconnectedtotheoutputamplifiercircuitsothatidletones(ifpresent)canbeobservedattheoutput.Theditherfunctionofthedigitalsignalgeneratormustalsobedisabledtoensureanall-0sdatastreamattheinputoftheDAC.
ThemeasurementsetupforSNRisidenticaltothatusedfordynamicrange,withtheexceptionoftheinputsignallevel(seethenotesinFigure40).Copyright?2005–2008,TexasInstrumentsIncorporatedSubmitDocumentationFeedback
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Apr-2015
PACKAGING INFORMATION
Orderable DevicePCM1609APTPCM1609APTR (1)
Status(1)Package TypePackagePinsPackageDrawingQtyLQFPLQFPPTPT48482501000Eco Plan(2)Lead/Ball Finish(6)MSL Peak Temp(3)Op Temp (°C)-25 to 85-25 to 85Device Marking(4/5)SamplesNRNDNRNDGreen (RoHS& no Sb/Br)Green (RoHS& no Sb/Br)CU NIPDAUCU NIPDAULevel-1-260C-UNLIMLevel-1-260C-UNLIMPCM1609APCM1609A The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms \"Lead-Free\" or \"Pb-Free\" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines \"Green\" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(4)
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a \"~\" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
24-Apr-2015
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGEMATERIALSINFORMATION
www.ti.com
14-Jul-2012
TAPEANDREELINFORMATION
*Alldimensionsarenominal
Device
PackagePackagePinsTypeDrawingLQFP
PT
48
SPQ
ReelReelA0DiameterWidth(mm)(mm)W1(mm)330.0
16.4
9.6
B0(mm)9.6
K0(mm)1.9
P1(mm)12.0
WPin1(mm)Quadrant16.0
Q2
PCM1609APTR1000
PackMaterials-Page1
PACKAGEMATERIALSINFORMATION
www.ti.com
14-Jul-2012
*Alldimensionsarenominal
DevicePCM1609APTR
PackageType
LQFP
PackageDrawing
PT
Pins48
SPQ1000
Length(mm)
367.0
Width(mm)367.0
Height(mm)
38.0
PackMaterials-Page2
MTQF003A – OCTOBER 1994 – REVISED DECEMBER 1996 MECHANICAL DATA PT (S-PQFP-G48) 0,270,173625PLASTIC QUAD FLATPACK0,500,08M372448130,13 NOM15,50 TYP7,20SQ6,809,20SQ8,801,451,350,05 MINGage Plane0,250°–7°12Seating Plane1,60 MAX0,100,750,4040052/C 11/96NOTES:A.B.C.D.All linear dimensions are in millimeters.This drawing is subject to change without notice.Falls within JEDEC MS-026This may also be a thermally enhanced plastic package with leads conected to the die pads.POST OFFICE BOX 655303 DALLAS, TEXAS 75265?1IMPORTANTNOTICE
TexasInstrumentsIncorporatedanditssubsidiaries(TI)reservetherighttomakecorrections,enhancements,improvementsandotherchangestoitssemiconductorproductsandservicesperJESD46,latestissue,andtodiscontinueanyproductorserviceperJESD48,latestissue.Buyersshouldobtainthelatestrelevantinformationbeforeplacingordersandshouldverifythatsuchinformationiscurrentandcomplete.Allsemiconductorproducts(alsoreferredtohereinas“components”)aresoldsubjecttoTI’stermsandconditionsofsalesuppliedatthetimeoforderacknowledgment.
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ResaleofTIcomponentsorserviceswithstatementsdifferentfromorbeyondtheparametersstatedbyTIforthatcomponentorservicevoidsallexpressandanyimpliedwarrantiesfortheassociatedTIcomponentorserviceandisanunfairanddeceptivebusinesspractice.TIisnotresponsibleorliableforanysuchstatements.
Buyeracknowledgesandagreesthatitissolelyresponsibleforcompliancewithalllegal,regulatoryandsafety-relatedrequirements
concerningitsproducts,andanyuseofTIcomponentsinitsapplications,notwithstandinganyapplications-relatedinformationorsupportthatmaybeprovidedbyTI.Buyerrepresentsandagreesthatithasallthenecessaryexpertisetocreateandimplementsafeguardswhichanticipatedangerousconsequencesoffailures,monitorfailuresandtheirconsequences,lessenthelikelihoodoffailuresthatmightcauseharmandtakeappropriateremedialactions.BuyerwillfullyindemnifyTIanditsrepresentativesagainstanydamagesarisingoutoftheuseofanyTIcomponentsinsafety-criticalapplications.
Insomecases,TIcomponentsmaybepromotedspecificallytofacilitatesafety-relatedapplications.Withsuchcomponents,TI’sgoalistohelpenablecustomerstodesignandcreatetheirownend-productsolutionsthatmeetapplicablefunctionalsafetystandardsandrequirements.Nonetheless,suchcomponentsaresubjecttotheseterms.
NoTIcomponentsareauthorizedforuseinFDAClassIII(orsimilarlife-criticalmedicalequipment)unlessauthorizedofficersofthepartieshaveexecutedaspecialagreementspecificallygoverningsuchuse.
OnlythoseTIcomponentswhichTIhasspecificallydesignatedasmilitarygradeor“enhancedplastic”aredesignedandintendedforuseinmilitary/aerospaceapplicationsorenvironments.BuyeracknowledgesandagreesthatanymilitaryoraerospaceuseofTIcomponentswhichhavenotbeensodesignatedissolelyattheBuyer'srisk,andthatBuyerissolelyresponsibleforcompliancewithalllegalandregulatoryrequirementsinconnectionwithsuchuse.
TIhasspecificallydesignatedcertaincomponentsasmeetingISO/TS16949requirements,mainlyforautomotiveuse.Inanycaseofuseofnon-designatedproducts,TIwillnotberesponsibleforanyfailuretomeetISO/TS16949.ProductsAudioAmplifiersDataConvertersDLP?ProductsDSP
ClocksandTimersInterfaceLogicPowerMgmtMicrocontrollersRFID
OMAPApplicationsProcessorsWirelessConnectivity
www.ti.com/audioamplifier.ti.comdataconverter.ti.comwww.dlp.comdsp.ti.comwww.ti.com/clocksinterface.ti.comlogic.ti.compower.ti.commicrocontroller.ti.comwww.ti-rfid.comwww.ti.com/omap
TIE2ECommunity
e2e.ti.com
www.ti.com/wirelessconnectivity
MailingAddress:TexasInstruments,PostOfficeBox655303,Dallas,Texas75265
Copyright?2015,TexasInstrumentsIncorporated
Applications
AutomotiveandTransportationCommunicationsandTelecomComputersandPeripheralsConsumerElectronicsEnergyandLightingIndustrialMedicalSecurity
Space,AvionicsandDefenseVideoandImaging
www.ti.com/automotivewww.ti.com/communicationswww.ti.com/computerswww.ti.com/consumer-appswww.ti.com/energywww.ti.com/industrialwww.ti.com/medicalwww.ti.com/security
www.ti.com/space-avionics-defensewww.ti.com/video
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