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FET with stable threshold voltage and method of ma

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專利名稱:FET with stable threshold voltage and

method of manufacturing the same

發(fā)明人:Vida Ilderem,Michael H. Kaneshiro,Diann

Dow

申請?zhí)枺篣S08/865846申請日:19970602公開號:US06017798A公開日:20000125

摘要:A low voltage field effect transistor structure (20) is provided with a thresholdvoltage that is tolerant of process variations that alter the location of a source implantregion (41). A first halo region (33) and a second halo region (36) are formed adjacent tosource region (41) such that after subsequent thermal processing, a constant dopingprofile of opposite conductivity as source region (41) is formed in the channel region (23)adjacent the source region (41). The embodiments can be formed either adjacent to onlythe source region (41) to create a unilateral device, or the doping profile can be formedadjacent to both source region (41) and a drain region (40) to produce a bilateral device.An additional embodiment forms a second implant region in source region (41) to reducejunction leakage and capacitance.

申請人:MOTOROLA, INC.

代理人:Rennie W. Dover

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